The present invention relates to a digital-to-digital sample rate converter for converting digital input signals having a first sample rate into digital output signals having a second sample rate.
In TV receivers, analog signal processing has been increasingly replaced by digital signal processing. Digital signal processing offers a wide range of possibilities for the improvement of picture quality, such as noise reduction, flicker reduction, interlacing and skew elimination. Furthermore, digital signal processing advantageously allows one to introduce special features, like, for instance, picture format conversion, panning of pictures, zooming or various cinema effects.
When digital picture signals are processed, for instance when a picture format conversion is to be performed, it may be necessary to convert an original sample rate of the digital signals into a sample rate different from the original sample rate.
In prior art TV receivers, the sample rate conversion is accomplished by converting the original digital signal, having the original sample rate F, into an analog signal and then converting this analog signal back into a new digital signal, having a sample rate F' different from the sample rate of the original digital signal.
A disadvantage of this prior art sample rate conversion is that the hardware to implement the sample rate conversion is complex, since the digital signal needs to be converted from digital to analog and back to digital.
Also, since this prior art sample rate conversion includes analog circuitry, the prior art sample rate conversion is subject to the well known disadvantages of analog components such as tolerances, drift and ageing.
In order to avoid the above mentioned problems related to analog circuitry, it seems advantageous to perform a digital-to-digital sample rate conversion instead of the prior art digital-to-analog-to-digital conversion method. From the theory of digital signal processing, the basic principles of digital-to-digital sample rate conversion are well known. The book "Multirate Digital Signal Processing", by Ronald E. Crochiere, Lawrence R. Rabiner, Prentice Hall, gives an overview of the theoretical background.
However, a direct hardware implementation of the structures for sample rate conversion suggested in the literature is rather inefficient. Such hardware for sample rate conversion requires a large number of multipliers as well as a large filter bank for the filter coefficient for the digital-to-digital sample rate conversion. This consequently means that a chip for digital-to-digital sample rate conversion, using the basic principles suggested in the literature, would have a large amount of gates. This causes not only technical problems, such as timing problems, but also increases the costs for the chip.